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GALS for Electronics Hobby

180px-PAL_22V10In this article Steve tells us about GALs and how to get started with them. No we are not talking about female hobbyist or how to pick up girls. GAL is short for Generic Array Logic. If your home projects use logic parts then you will be interested in GALs. These parts may be the only device you need in your Logic parts bin. They are programmable to implement the logic of almost any logic device and they can do so much more.

This article was submitted by  Steve Chamberlin as part of the “Hobby parts for articles” program. Steve will receive an Arduino compatible Really Bare Bones Board kit (RBBB) from the Modern Device Company for this great article.

A GAL (gate array logic) is a hobbyist-friendly reprogrammable chip that’s perfect for creating customized "glue logic" for your electronics projects. If you often work with common 7400-series parts like NAND gates, counters, and muxes, you’ve probably run into cases where you wished you could change just one little thing about a part, like make that active low output be active high, or change a synchronous clear input into an asynchronous one. Using GALs you can do this with ease. Can’t find a source for some of the more obscure 7400-series parts? No problem, create a work-alike with a GAL. Is glue logic eating up too much space on your board? You can typically replace 3-5 basic logic gates and similar parts with a single GAL.

GALs are the simplest member of the programmable logic family that also includes CPLDs and FPGAs. They are the modern replacement for the one-time programmable PAL devices that were first introduced in the late 1970’s. Unlike PALs, GALs can be erased and reprogrammed many times. And unlike CPLDs and FPGAs, GALs don’t require using a hardware synthesis language like VHDL or Verilog, or any other special design tools. Although it’s possible to use fancier tools to configure GALs, the simplest method is just to write logic equations in a plain text file, defining each output in terms of the inputs. Run your equations through a command-line tool to create the binary GAL data, and you’re ready to go. Easy as pie!

img12443 You’ll find GALs in many varieties, but the most useful to hobbyists is the 22v10 in a DIP package. The 22v10 GAL is a 24-pin 0.3" DIP, with 12 dedicated inputs, and another 10 pins that can be configured as outputs, inputs, or bidirectional. You’ll find them at electronics suppliers like Mouser and Jameco for about $2 to $4 apiece. Futurlec also has GALs at very attractive prices.

You don’t need to know or understand the internal structure of a GAL in order to use one, but it’s interesting nonetheless. Knowing the internal structure of the GAL also makes it possible to work backwards from the binary GAL data to the original equations, if you ever need to reverse-engineer a GAL program.

Take a look at the schematic diagram of the 22v10 internals on the Lattice Semiconductor datasheet page 6, you’ll see it’s really a marvel of clever engineering. Each of the chip’s inputs is routed to a horizontal wire row within a large array. Each output has a small block containing a single OR gate fed by between 8 and 16 AND gates, with each AND gate fed from another horizontal row in the array. The array also contains many vertical wire columns. At each point where a horizontal and vertical wire cross, there’s a fuse that can be programmed as opened or closed.

By burning the right fuses, any input wire can be connected to any AND wire by means of one of the vertical cross-wires, enabling the programming of an arbitrary sum-of-products equation, like Y = A*B*/C + /A*C + /B.  In this notation * means a logical AND, + means a logical OR, and / means a logical NOT.

GAL equations are authored in a plain text file, using a format called EQN, and are then converted to a binary format called JEDCOM, or JED, which contains the fuse data. The DOS command-line program that does this conversion is named eqn2jed.exe. You can find this tool through a web search, or just grab it out of the Opal Jr package here, part of a National Semiconductor tool suite. The syntax of a .eqn file is:

  • Optional comment lines, beginning with a semicolon
  • A CHIP line, defining the chip’s name and type (e.g. MyChip 22v10)
  • A list of symbolic names for each pin number
  • An EQUATIONS heading
  • A list of equations for each output, one per line, in sum-of-products format

For example, here’s a .eqn file that implements a 16-t
o-1 mux: A 4-bit select input A is used to select one of 16 data inputs D, which is passed to a single data output Q.

; 16-to-1 mux example
CHIP mux G22V10
d0=1 d1=2 d2=3 d3=4 d4=5 d5=6 d6=7 d7=8 d8=9 d9=10 d10=11 gnd=12
d11=13 d12=14 d13=15 d14=16 d15=17 q=18 a0=19 a1=20 a2=21 a3=22 nc=23 vcc=24

EQUATIONS
q = /a3*/a2*/a1*/a0*d0 +
    /a3*/a2*/a1*a0*d1 +
    /a3*/a2*a1*/a0*d2 +
    /a3*/a2*a1*a0*d3 +
    /a3*a2*/a1*/a0*d4 +
    /a3*a2*/a1*a0*d5 +
    /a3*a2*a1*/a0*d6 +
    /a3*a2*a1*a0*d7 +
    a3*/a2*/a1*/a0*d8 +
    a3*/a2*/a1*a0*d9 +
    a3*/a2*a1*/a0*d10 +
    a3*/a2*a1*a0*d11 +
    a3*a2*/a1*/a0*d12 +
    a3*a2*/a1*a0*d13 +
    a3*a2*a1*/a0*d14 +
    a3*a2*a1*a0*d15 +

The mux example has a single combinatorial output, which is always enabled, but the 22v10 is capable of much more interesting behavior. You can have up to 10 outputs, with each one being combinatorial or registered (changing state at a clock boundary, like a flip-flop). Outputs can also be used as input terms in the computation of other outputs. Additionally, outputs have an optional output enable term, allowing them to be connected directly to a bus that is sometimes driven by other chips.

More complex examples of GAL usage in hobbyist projects are things like address decoders or peripheral interfaces. In my current project, I configured a 22v10 GAL as an 8-bit stack register for a custom CPU design. In a single GAL, I was able to implement an 8-bit up/down counter with a parallel load input and an output enable. I also implemented the CPU’s address decoder logic and some other control logic using GALs. You can see the relevant .eqn files beginning on page 8 of the machine specs.

After you’ve written your .eqn file and used eqn2jed to create the .jed binary file, all that’s left is to program the chip. GALs are programmed using standard programming hardware, just like an EPROM or microcontroller. If you’ve got a decent universal programmer, chances are it already supports GALs. Unfortunately some of the most popular inexpensive programmers like the Willem EPROM Programmer don’t support GALs, so check the list of supported devices carefully. I use the Easy Pro 90B, which supports GALs as well as EPROMs, microcontrollers, and most other programmable devices.  

Once you start using GALs in your project designs, you’ll wonder how you ever lived without them. No other cheap, hobbyist-friendly logic device offers the same combination of flexibility and ease-of-use. Where a CPLD or microcontroller would be overkill, and a pile of separate gates would cumbersome, a GAL is the perfect fit.

[David of uCHobby] I did a quick search for hobby programming options and found the following:

Comments Please:

  • Have you used any of these programmers?
  • Have a programmer or parts supplier suggestion for GALs?
  • Cool project that uses GALs?

Let us know with a comment.

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17 Responses

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  1. Bitartist. says

    I used the GAL before in college.

    You can either write the logic equations or truth table into the program file and then generate the .jed binary file to be progammed to the GAL chip.

  2. Al Williams says

    I personally think the cost of CPLDs are low enough now that I would not consider using a GAL for anything. For example, the Xilinx XC95xx family is available in PLCC which is easy to work with. As for Verilog, if you know any sort of programming, it takes just a bit to learn Verilog. In fact, as a GAL replacement you can write:

    module gal(output z0, output z1, input a, input b, input c);
    z0=a&b|~c;
    z1=b&(~(c|d));
    endmodule

    for example. Then you have to use a GUI editor to map z0, z1, a, b, and c to physical pins on the CPLD. The CPLD stays programmed (unlike most FPGAs) and doesn’t require any external parts.

    I have long been an advocate of getting hobby electronics moved to CPLDs and FPGAs (including a couple of articles in N&V, DDJ, etc.). Try this tutorial: http://tutor.al-williams.com/pldx-1.htm. All the tools from Altera and Xilinx are free these days (the ones you need anyway) so you can actually do the tutorial, and simulate your designs for free. You don’t need to spend any money until you are ready to “burn silicon” ;-)

    As for me? I have two CPU designs I work on from time to time all in Verilog. One is a 16-bit machine and one is a novel 32-bit machine. Of course, these run on huge FPGAs (on a board that costs about $100). I did a Nuts & Volts article a while back on a simple “logic analyzer” in a CPLD that outputs stored waveforms on an oscilloscope.

    The funny thing is, all the tools come with schematic editors also, so you can draw your logic. At first you think, “Well, that’s all I need!” But you soon realize it is WAY easier to use the HDLs.

    For example, think of a BCD to 7 segment decoder. Sure, I can design all the gates required. I probably did it as homework 30 years ago. But in Verilog I’d write:

    case (val)
    4’b0000: seg

  3. Al Williams says

    Whoops that was too early in the morning. Should be:

    assign z0=a&b|~c;
    assign z1=b&(~(c|d));

    Sorry about that!

  4. dfowler says

    Al,

    I have used CPLDs in the past and found them easy to deal with. Are there any dip versions of CPLDs? Dips are easy for the hobbyist as they work in solderless breadboards.

    Maybe someone sells a simple adaptor board which includes a CPLD and some interface for programming, this adaptor might work with a solderless breadboard. It could be like an Arduino setup only for CPLDs.

    Would you do an article for uCHobby to help people get started with CPLDs? The key factors will be prototyping and the cost of tools.

  5. Al Williams says

    I used to sell a board designed for the Xilinx 98xx series like you describe. However, the demand was not there and in addition, when a whole FPGA board is $100 there is little mark up in a small CPLD board. The 98xx series can be had in PLCC so with a PLCC socket it is not hard to work with them.

    And not to plug one of my competitors but check this out:
    http://www.digilentinc.com/Products/Detail.cfm?Prod=CMOD&Nav1=Products&Nav2=Programmable

    40 pin DIP with a mid size CPLD onboard for $18 in singles.

  6. Steve Chamberlin says

    I think every tool has its place. CPLDs and FPGAs are great for building medium to highly complex designs, where your goal is to get your design to work with the minimum of fuss. I’ve done a fair bit of Verilog design, and certainly if I were doing a professional project, I would use them wherever it was cost-effective. I probably wouldn’t be bothering with discrete gates or other simple logic components at all. For that matter, I probably could have done my entire custom CPU project as a single FPGA.

    My gripe with CPLDs and FPGAs for hobby/educational/tinkering projects is that they inhabit an entirely different realm of abstraction. I’ll write some Verilog, and a compiler will generate some macrocells, and I really don’t know what’s happening underneath. It becomes something of a black box, and I can’t claim to really understand how it works. At that point, it starts to feel more like a software project, and I lose interest. GALs feel like the appropriate tool if you want programmable logic at a similar abstraction level to other basic logic components like counters, registers, muxes, etc, and that are small, cheap, available as a DIP, and don’t require any special software to use.

  7. Steve Chamberlin says

    My mux example in the original article was a little dull. Here are a couple of other more interesting ones:

    A GAL can be used as a cheap stepper motor controller for a robotics project. Check out this GAL design, that takes 6 inputs (clock, direction, half/full step, step enable, reset, and output enable), and generates 7 outputs (3 to generate the binary sequence, and 4 for the output stepper motor), all in a single 16V8 GAL.
    http://www.geocities.com/dsaproject/electronics/arm-bot/stepper_ctrl.html#GAL_CONTROLLER

    Andrew Holme’s Mark 2 Forth computer uses GALs extensively, for things like the state machine controlling the fetch/execute cycle, and instruction decoding. http://www.holmea.demon.co.uk/Mk2/Architecture.htm

    My own “Big Mess o’ Wires” CPU project uses GALs in several places:
    – Address decoder: given a memory address, determines if it’s in RAM, ROM, a memory-mapped I/O device, etc, and generates the needed control signals.
    – Keyboard interface: shifts in serial bits from a connected PS/2 keyboard, stores them, and generates a CPU interrupt when a new byte is ready.
    – ALU condition codes: generates and shifts the overflow, negative, and zero flags for an arithmetic operation.
    – LCD interface: receives bytes to be written to the LCD, and retransmits them to the LCD at a slower speed, while also generating the required LCD control signals.
    http://www.stevechamberlin.com/cpu

  8. Viadd says

    Digikey shows 7 different types of CPLDs in DIP format (28-40 pin). These are all from Atmel.

  9. Olivier says

    Hi,
    Which software do you use to compile from abel or schematic to obtain jedec file ?
    and to download jedec file into chip ?

    ispGAL is an old chip, and i didn’t find this ref in the chip configuration tool of lattice software.

    thank.

  10. Jonathan says

    My first really big digital project used two GAL16V8s. I made a home-made programmer and used a really terrible program by atmel to make the jed file

    This way required no experience or money, and is an ideal introduction to PLDs. I am very surprised the store I went to actually had the chips, wow

    The down side is GAL16V8s use over 70 mA each!!!

    Now I just use Altera CPLDs, they are way better

  11. Alan in D.C. says

    I was told a GAL would be the ideal replacement for the old Top-Octave Synthesizer chips of the early ’80s. You would input a high-frequency signal on the order of about 2 MHz or so, and the chip would divide this down to a single, fairly accurate, C-to-C chromatic musical octave.

    I like the idea, but I’ve got a mental block when it comes to programming the divisors. Has anyone done this, and just how simple is it?

  12. John says

    David,

    1. Very well written summary. Thanks!!! New users need all the help they can get – and that was spot-on!! (myself included)

    2. Do you think a GAL could be used to Provide a signal (to push a button) at a set of user-specified times-of-day over a weeks duration. Typically it will (or can) be “on the hour” if-that-helps, making 168 possibilities (24*7=168). Time-specs and changes to them can be re/programed to the GAL each time, or preferable would be to include an interface of some sort to specify the times and changes to them.
    …Any insights able to be provided on how to do this or what else may be needed, or to better approaches, would be much-appreciated!…

    John

  13. dfowler says

    John,

    Thank you for the compliments. This article was written by Steve Chamberlin so he deserves the praise.

    A GAL could be configured to do as you sugest. It would take more then just the GAL however. You would need a time base and somththing to press the button. All the logic to implment a state machine that waited for the correct amount of time and signaled the button press could be implemented in one or more GALs.

    In your example a small uC might be a better solution.

  14. Steve Chamberlin says

    I agree a GAL isn’t a good solution for the proposed “time of day” circuit. A microcontroller or stand-alone RTC seems more appropriate. Likewise, I don’t think you could use a GAL to replace the synthesizer chip that Alan mentioned. They are really quite basic, with at most 10 bits of internal state (one flip-flop per output).

    Where I think GALs make the most sense is as “glue” between two or more other chips, where some set of existing signals must be converted/muxed/stored/shifted/reversed/whatever to produce a new set of output signals. This might sound very limiting, but it still allows for some quite interesting applications, as I tried to show with the examples I gave earlier.

  15. mad93 says

    In the university we simulated a CAM memory with a RAM and implemented the states machine (sorry, literal translation from my language, i don’t know how it’s called in english) with six GALs.

    It worked fine, but the consume was insane, 1 A, and after three months the GALs were ‘erased’.

    I found them useful and easy to play, but not useful for any ‘serious’ implementation, since it’s consume it’s crazy (comparted to a uc) and it’s fragility.

    We used 16v8 and 22v10, and I think they are quite expensive for what the are able to do.

  16. John says

    David and Steve,

    Thanks much for your great replies!! I suspected that such (day-time clock pulse work-difficulty) may be the case yet wanted to make sure…

    Thanks too for your great tutorials and projects, which help all of us new-users who are just getting started…!!

    John